1. Field of the Invention
The present invention relates to apparatus for protecting integrated circuits (ICs) against electrostatic discharge (ESD) damage. More particularly, this invention relates to a protection circuit using a single bipolar guarding transistor to divert dangerous charge accumulations away from the input of ICs. The bipolar guarding transistor either undergoes punch-through in the presence of an over-voltage or is turned on by base current delivered by a backup switch coupled between the input node and the bipolar guarding transistor's base node.
2. Description of the Prior Art
The risks to ICs posed by accumulations of electrostatic charge are well known. Although they generally constitute but a small quantity of charge, such accumulations can result in quite high voltages and thus high risk to circuit elements through which they may be discharged.
ESD protection strategies have generally involved providing a voltage-sensitive switch through which the accumulated charge can be diverted and then drained harmlessly. Such a switch must be implemented so that legitimate data signals are not also diverted. Typical data signals range from a logic-high of five volts to a logic-low of 0 volts. The transient voltage spikes against which protection is sought are of varying magnitudes. Any ESD protection device must ensure that all voltages exceeding the circuit's damage-threshold level--which may be just a few volts above the logic-high level--are diverted, while voltages at the logic-high level and below are left unaffected. The other requirement, of course, is that the ESD protection work extremely fast; it will do no good to divert a 20-volt pulse after that pulse has permanently damaged the circuit. It will also hamper normal circuit performance if the protection device requires so long to discharge the spike that the circuit input is "pegged" at a fixed voltage for a prolonged time, even if that voltage does not cause permanent damage.
FIG. 1 shows a prior-art ESD protection device depending on discharge through a forward-biased diode, either to the high-potential power rail or to the low potential power rail, depending on the polarity of the spike. Positive spikes that exceed V.sub.cc plus the voltage drop across a forward-biased diode, D1, will be diverted to the high-potential power rail. Negative spikes reaching a magnitude exceeding the voltage drop across a forward-biased diode, D2, will be diverted to the low-potential power rail. In both instances, the dangerous voltage is dropped across the input resistor R, and the actual circuit input node is subjected to electrostatic pulses exceeding V.sub.cc or dropping below ground by no more that the drop across a forward-biased p-n junction. The shortcoming of this circuit is that the RC time-constant established by the input resistor and the capacitance or the spike-diverting diode extends the discharge period, and hence the period the circuit input is pegged, hampering the normal response of the circuit to incoming signals.
Other prior-art circuits, such as the one shown in FIG. 2, use bipolar transistors as the operative circuit element in the protection. Then the switching event is the collector-to-emitter breakdown ("punch-through" ) of the bipolar guarding transistor. These units avoid the time-constant retardation of the FIG. 1 circuit and break down very quickly when exposed to voltages above their breakdown threshold. Furthermore, bipolar transistors, whether in punch-through or in ordinary conduction, can carry a very high current, a necessity for disposing of the electrostatic buildup before it can cause damage. The weakness of this type of protection is its reliance on the bipolar transistor's breakdown voltage. It is well-known that in the IC fabrication process it is extremely difficult to ensure a narrow range of punch-through voltages of bipolar transistors. This means that across a production run the punch-through voltage for a particular bipolar transistor will display a scatter, with a significant proportion breaking down either at voltages lower than the design breakdown voltage or at voltages considerably higher than called for. This is in the nature of bipolar transistors produced by IC fabrication processes, and it obviously is a serious problem when the ESD protection is provided by a bipolar transistor alone, as in FIG. 2. The consequences include both circuits in which the protective mechanism kicks in at too low a voltage, in effect cutting off logic-high data signals, and circuits in which the protective mechanism does not kick in even though exposed to voltage spikes that are high enough to destroy the circuit being guarded.
Better results can be obtained over the bipolar punch-through voltage by tying the transistor base to its emitter through a resistance R. This can prevent the low-voltage (premature) breakdowns that divert legitimate signals. It also helps cut down on the number of units in which the punch-through voltage is too high. However, even this approach cannot ensure that every single unit will contain the needed ESD protection; some units will be destroyed because the bipolar transistor failed to breakdown at voltages above the damage threshold.
MOS transistors are subject to much tighter production controls; in particular the source-to-drain breakdown voltage can be predicted with a high degree of confidence. Thus, it might seem that the ESD problem could be solved by substituting a MOS transistor for the bipolar one; indeed, there are prior-art circuits in which ESD protection is provided by a MOS transistor connected between the line-to-be-protected and one of the power rails. This solves the problem of diverting all voltage pulses above a well-defined threshold. Unfortunately, the MOS transistors' low current-carrying capacity means that they generally require too long to discharge a potentially-lethal charge. This appears to be true also of the other voltage-sensitive switches capable of being manufactured as part of ICs while nevertheless being held to within a narrow range of switching voltages.
Therefore, what is needed is some means of backing up that minority of bipolar guarding transistors which fail to undergo punch-through at a sufficiently low voltage, some means of causing those guarding transistors to provide a high-capacity current path for input voltages which do not exceed the punch-through voltage of the guarding transistors.